Meeting Minutes 2008/3/27

· Thursday, March 27, 2008 ·

Attendees
  • Shiyi, Xiaojun, Zhiliang, Yunyun, Stone, Liyun, Bin, Shengguo, Weifeng, Yun
Synopsis
  1. Setup a good working scheme to make the TD development smoother and more effective. From now on, it is necessary that the leaders of system group, algorithm group and ASIC group have to submit an officially confirmation in a Email before any module’s deliverable fixed. Discussion between group members will be more frequently, especially face-to-face or via telephone.
  2. System and algorithm group will raise their hand as early as possible when they need to change any interface between DSP and hardware or any system requirement.
  3. For the development module, Bit-scramble / 2nd interleaving / Mapping, it seems there would not be much change based on current ASIC micro-architecture. Maybe the buffer’s structure will be re-designed. Adding the CCTrCH number and current CCTrCH flag into the configure register is needed. Or something minus like that.
  4. HSDPA/HSUPA will definitely be supported in our modem. We must consider if current architectures are easy to upgrade in advance.
  5. Assign an ASIC person to take charge of the TDMA engine.
  6. A schedule for the TD modem development will be drafted.
Action Items
  1. Zhiliang: Update and release the TxEnc HDL document according to the discussion.
  2. Shengguo: Consider the design change to meet two-time calling for 2 CCTrCH by DSP. Also HSDPA/HSUPA supporting should be considered in the next revision.
  3. Yun: Continue the verification with Shengguo’s design.
  4. Bin: Draft a modem developing schedule.
  5. I’d like to assign Lu Shi to be the ASIC owner of TDMA engine. Xiaojun: please contact Lu when you release the system spec.