Milestone List for Next Week

Following milestones would be achieved by the next weekend (Friday, May 16th, 2008)
  • L1 System Phase (Shiyi's Team)
  1. Finish IR buffer/HARQ HSDPA HLD design.
  • Algorithm Phase (Stone's Team)
  1. Finish C coding of Channel Estimation.
  2. Deliver Block-V Generation LLD spec.
  3. Deliver EBIM LLD spec.
  • ASIC Phase (Xikai's Team)
  1. Deliver micro-architectural design spec of Channel Estimation.
  2. Finish DCC & DAGC RTL coding.
  3. Deliver DCC & DAGC testplan for review.
  4. Finish DCC & DAGC testbench design for verification.