TD milestones for next week

· Sunday, May 25, 2008 · ,

Following milestones would be archieved by the next weekend (Friday, May 30, 2008)

L1 System Phase (Shiyi's team)
  1. Complete HSDPA HLD documentation.
  2. Complete Initial Cell Search Fast AGC LLD design.
Algorithm Phase (Stone's team)
  1. Deliver fixed-point C code of JD matched filter.
  2. Deliver fixed-point C code of HARQ.
ASIC Phase (Xikai's team)
  1. Complete Block-V generation RTL coding.
  2. Complete JD matched filter LLD iteration and joint review.
  3. Complete HARQ LLD iteration and joint review.
Preacted or Delayed Items
  1. Channel Estimation delayed 2 weeks at ASIC micro-architectural design stage.